A code-division multiple access (CDMA) system uses orthogonal spreading codes for simultaneous transmissions of data for multiple users over the same bandwidth. When the chip-rate increases, especially in the high-speed downlink packet access (HSDPA) extension of wideband code-division multiple access (WCDMA), the underlying multipath channels become frequency selective, destroying the code orthogonality and causing inter-chip interference. Inter-chip interference limits the system capacity and the availability of high data rate services.
To suppress the interference in the downlink, a linear equalization scheme has been proposed for partially restoring the orthogonality of the users' spreading codes. In particular, a linear filter of length N with certain taps is used to produce an equalized output, as shown in FIG. 1. As shown in FIG. 1, a sequence of transmitted chips, s, is used for data transmission through a plurality of multipath channels h. At the receiver, a signal r is received. After the received signal r is filtered by a chip-waveform matched filter, a sequence of samples, y, is observed. Taking noise, n, into account, the received sample sequence can be expressed asy=Hs+n  (1)where H is the Sylvester convolution matrix seen in the expanded matrix representation below:
                              [                                                                      y                  0                                                                                                      y                  1                                                                                                      y                  2                                                                                                      y                  3                                                                                                      y                  4                                                                                                      y                  5                                                              ]                =                                            [                                                                                          h                      2                                                                                                  h                      0                                                                                                                                                                                                                                                                                                                                      h                      3                                                                                                  h                      1                                                                                                                                                                                                                                                                                                                                                                                                                                        h                      2                                                                                                  h                      0                                                                                                                                                                                                                                                                                                                                      h                      3                                                                                                  h                      1                                                                                                                                                                                                                                                                                                                                                                                                                                        h                      2                                                                                                  h                      0                                                                                                                                                                                                                                                                                                                                      h                      3                                                                                                  h                      1                                                                                  ]                        ⁡                          [                                                                                          s                      0                                                                                                                                  s                      1                                                                                                                                  s                      2                                                                                                                                  s                      3                                                                                  ]                                +                      [                                                                                n                    0                                                                                                                    n                    1                                                                                                                    n                    2                                                                                                                    n                    3                                                                                                                    n                    4                                                                                                                    n                    5                                                                        ]                                              (        2        )            In this matrix representation, h={h0, h1, h2, h3} and there are two samples per chip in to the equalizer. As h is the overall impulse response, it includes the effects of the transmit and receive filters.
For a target chip index D, it is possible to calculate the delay-dependent taps x(D) so as to produce an equalized chip ŜD, which is the minimum mean square error (MMSE) estimate of the Dth chip transmitted, sD, with an error variance PD. In the example above, for y={y0, . . . , y5}, the possible chips to estimate come from s={s0, s1, s2, s3} so that D is chosen from {0, 1, 2, 3}. The filter construction means that one chip is estimated at a time. The problem is to decide, given a sequence of yk values, with k being the sample index, which chip should be estimated. In other words, it is necessary to decide the value of target chip index D.
Al-Dhahir et al. (“Efficiently Computed Reduced-Parameter Input-Aided MMSE Equalizers for ML Detection: A Unified Approach”, IEEE Transactions on Information Theory, Vol. 42, No. 3, May 1996) has shown that the effect of the delay parameter on output signal-to-noise ration (SNR) is significant. A non-optimized delay could result in an appreciable performance degradation. Thus, it is important to estimate the delay parameter.
Krauss et al. (“Simple MMSE Equalizers for CDMA Dowlink to Restore Chip Sequence: Comparison to Zero-forcing and Rake”, ICASSP 2000) has shown a way to calculate the value of target chip index D by first solving for the error variance PD and then choosingD=arg min (PD)  (3)According to Krauss et al., the minimization of the MMSE gives the filter, x, as the solution of linear equations Ax=b, where A=σs2HH′+σn2I, b=σs2HδD, σn2 is the variance of the noise term n, and H′ is the Hermetian transpose of H. The x, which is the solution of the system of linear equations, represents the taps of the chip level equalizer. The evaluation of the MMSE as a function of D results inMMSE(D)=σs2 (1−x(D)hD),  (4)where hD is the channel impulse response shifted by D chip periods, and x(D) is the Hermetian transpose of x(D). By finding MMSE(D) for D=1, . . . , N, the value of the target chip index D to be estimated is the D that gives the smallest MMSE. This process for finding all the MMSE values is equivalent to computing the complete inverse of A in order to solve for x in a system of linear equations Ax=b.
While the value of target chip index, D, as determined in Krauss et al., can be used to reduce the output mean-square error (MSE), the computation is complex due to the process of solving A−1. This requires the computation of inverse of the matrix A thousands of times per second.
It is advantageous and desirable to provide a simple method and device for estimating the value of target chip index D.